Pin Assignments
only Banks 1, 2, and 3 should be used, that is, on the east edge of the package. If using unlocked automatic pin
assignment, you need to make sure that bank 8 is not used for PCI IOs.
Figure 9-5 · SmartFusion2 M2S050T Device
Note:
?
?
Do not use bank 8 for PCI I/Os
Use bank 1, 2, and 3 for PCI I/Os
Alternatively, this may be achieved by manually assigning I/Os to banks 1, 2, and 3. After that, achieving timing should
be done either by using the provided PDC file as a reference and modifying as necessary, or by following these steps:
1.
2.
3.
Using the following configuration and pin assignment, run an initial Place and Route using High-Effort,
Timing-driven routing .
a. Use -iostd PCI to ensure that I/Os are assigned to PCI compatible pins.
b. Where possible, force the placer to use I/O registers using the -REGISTER Yes switch and the -OUT_REG Yes
or -IN_REG Yes depending on whether the register resides in the input or output path for that particular I/O. It
is possible that they are both, if both Master and Target modes are enabled.
c. Do not assign PCI I/Os to any pins.
d. Depending on the data width, TRDYN and IRDYN may be best routed through a global net. In 64-bit mode,
TRDYN and IRDYN are best routed locally. In 32-bit mode, TRDYN and IRDYN are best routed globally.
Lock down the I/O in the Libero I/O constraints editor or modify the PDC file by adding the pinname the -fixed
yes switch to each set_io line.
Run SmartTime to perform static timing analysis.
v4.0
131
相关PDF资料
COREU1LL-AR IP MODULE COREU1LL
COREU1PHY-AR IP MODULE COREU1PHY
CORR-8BIT-XM-UT2 SITE LICENSE IP CORRELATOR XP
CP2-GSA-L CONN SHIELD LOWER TYPE A 22
CP2-HSA110-1 CONN SHROUD CPCI 2MM TYPE A 22
CP2-HSC055-4 CONN SHROUD CPCI 2MM TYPE C 11
CP2-K3567-SR-F COMPACT PCI - MISC
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